mirror of
https://github.com/ClickHouse/ClickHouse.git
synced 2024-11-18 05:32:52 +00:00
292 lines
12 KiB
CMake
292 lines
12 KiB
CMake
# https://software.intel.com/sites/landingpage/IntrinsicsGuide/
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include (CheckCXXSourceCompiles)
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include (CMakePushCheckState)
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cmake_push_check_state ()
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# The variables HAVE_* determine if compiler has support for the flag to use the corresponding instruction set.
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# The options ENABLE_* determine if we will tell compiler to actually use the corresponding instruction set if compiler can do it.
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# All of them are unrelated to the instruction set at the host machine
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# (you can compile for newer instruction set on old machines and vice versa).
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option (ARCH_NATIVE "Add -march=native compiler flag. This makes your binaries non-portable but more performant code may be generated. This option overrides ENABLE_* options for specific instruction set. Highly not recommended to use." 0)
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if (ARCH_NATIVE)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} -march=native")
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elseif (ARCH_AARCH64)
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# ARM publishes almost every year a new revision of it's ISA [1]. Each version comes with new mandatory and optional features from
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# which CPU vendors can pick and choose. This creates a lot of variability ... We provide two build "profiles", one for maximum
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# compatibility intended to run on all 64-bit ARM hardware released after 2013 (e.g. Raspberry Pi 4), and one for modern ARM server
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# CPUs, (e.g. Graviton).
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#
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# [1] https://en.wikipedia.org/wiki/AArch64
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option (NO_ARMV81_OR_HIGHER "Disable ARMv8.1 or higher on Aarch64 for maximum compatibility with older/embedded hardware." 0)
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if (NO_ARMV81_OR_HIGHER)
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# crc32 is optional in v8.0 and mandatory in v8.1. Enable it as __crc32()* is used in lot's of places and even very old ARM CPUs
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# support it.
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set (COMPILER_FLAGS "${COMPILER_FLAGS} -march=armv8+crc")
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else ()
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# ARMv8.2 is quite ancient but the lowest common denominator supported by both Graviton 2 and 3 processors [1]. In particular, it
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# includes LSE (made mandatory with ARMv8.1) which provides nice speedups without having to fall back to compat flag
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# "-moutline-atomics" for v8.0 [2, 3, 4] that requires a recent glibc with runtime dispatch helper, limiting our ability to run on
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# old OSs.
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#
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# simd: NEON, introduced as optional in v8.0, A few extensions were added with v8.1 but it's still not mandatory. Enables the
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# compiler to auto-vectorize.
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# sve: Scalable Vector Extensions, introduced as optional in v8.2. Available in Graviton 3 but not in Graviton 2, and most likely
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# also not in CI machines. Compiler support for autovectorization is rudimentary at the time of writing, see [5]. Can be
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# enabled one-fine-day (TM) but not now.
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# ssbs: "Speculative Store Bypass Safe". Optional in v8.0, mandatory in v8.5. Meltdown/spectre countermeasure.
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# crypto: SHA1, SHA256, AES. Optional in v8.0. In v8.4, further algorithms were added but it's still optional, see [6].
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# dotprod: Scalar vector product (SDOT and UDOT instructions). Probably the most obscure extra flag with doubtful performance benefits
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# but it has been activated since always, so why not enable it. It's not 100% clear in which revision this flag was
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# introduced as optional, either in v8.2 [7] or in v8.4 [8].
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# ldapr: Load-Acquire RCpc Register. Better support of release/acquire of atomics. Good for allocators and high contention code.
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# Optional in v8.2, mandatory in v8.3 [9]. Supported in Graviton 2+, Azure and GCP instances. Generated from clang 15.
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#
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# [1] https://github.com/aws/aws-graviton-getting-started/blob/main/c-c%2B%2B.md
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# [2] https://community.arm.com/arm-community-blogs/b/tools-software-ides-blog/posts/making-the-most-of-the-arm-architecture-in-gcc-10
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# [3] https://mysqlonarm.github.io/ARM-LSE-and-MySQL/
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# [4] https://dev.to/aws-builders/large-system-extensions-for-aws-graviton-processors-3eci
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# [5] https://developer.arm.com/tools-and-software/open-source-software/developer-tools/llvm-toolchain/sve-support
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# [6] https://developer.arm.com/documentation/100067/0612/armclang-Command-line-Options/-mcpu?lang=en
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# [7] https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
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# [8] https://developer.arm.com/documentation/102651/a/What-are-dot-product-intructions-
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# [9] https://developer.arm.com/documentation/dui0801/g/A64-Data-Transfer-Instructions/LDAPR?lang=en
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set (COMPILER_FLAGS "${COMPILER_FLAGS} -march=armv8.2-a+simd+crypto+dotprod+ssbs -Xclang=-target-feature -Xclang=+ldapr -Wno-unused-command-line-argument")
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endif ()
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elseif (ARCH_PPC64LE)
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# By Default, build for power8 and up, allow building for power9 and up
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# Note that gcc and clang have support for x86 SSE2 intrinsics when building for PowerPC
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option (POWER9 "Build for Power 9 CPU and above" 0)
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if(POWER9)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} -maltivec -mcpu=power9 -D__SSE2__=1 -DNO_WARN_X86_INTRINSICS")
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else ()
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set (COMPILER_FLAGS "${COMPILER_FLAGS} -maltivec -mcpu=power8 -D__SSE2__=1 -DNO_WARN_X86_INTRINSICS")
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endif ()
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elseif (ARCH_AMD64)
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option (ENABLE_SSSE3 "Use SSSE3 instructions on x86_64" 1)
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option (ENABLE_SSE41 "Use SSE4.1 instructions on x86_64" 1)
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option (ENABLE_SSE42 "Use SSE4.2 instructions on x86_64" 1)
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option (ENABLE_PCLMULQDQ "Use pclmulqdq instructions on x86_64" 1)
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option (ENABLE_POPCNT "Use popcnt instructions on x86_64" 1)
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option (ENABLE_AVX "Use AVX instructions on x86_64" 0)
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option (ENABLE_AVX2 "Use AVX2 instructions on x86_64" 0)
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option (ENABLE_AVX512 "Use AVX512 instructions on x86_64" 0)
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option (ENABLE_AVX512_VBMI "Use AVX512_VBMI instruction on x86_64 (depends on ENABLE_AVX512)" 0)
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option (ENABLE_BMI "Use BMI instructions on x86_64" 0)
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option (ENABLE_BMI2 "Use BMI2 instructions on x86_64 (depends on ENABLE_AVX2)" 0)
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option (ENABLE_AVX2_FOR_SPEC_OP "Use avx2 instructions for specific operations on x86_64" 0)
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option (ENABLE_AVX512_FOR_SPEC_OP "Use avx512 instructions for specific operations on x86_64" 0)
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option (NO_SSE3_OR_HIGHER "Disable SSE3 or higher on x86_64 for maximum compatibility with older/embedded hardware." 0)
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if (NO_SSE3_OR_HIGHER)
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SET(ENABLE_SSSE3 0)
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SET(ENABLE_SSE41 0)
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SET(ENABLE_SSE42 0)
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SET(ENABLE_PCLMULQDQ 0)
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SET(ENABLE_POPCNT 0)
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SET(ENABLE_AVX 0)
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SET(ENABLE_AVX2 0)
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SET(ENABLE_AVX512 0)
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SET(ENABLE_AVX512_VBMI 0)
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SET(ENABLE_BMI 0)
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SET(ENABLE_BMI2 0)
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SET(ENABLE_AVX2_FOR_SPEC_OP 0)
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SET(ENABLE_AVX512_FOR_SPEC_OP 0)
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endif()
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# ClickHouse can be cross-compiled (e.g. on an ARM host for x86) but it is also possible to build ClickHouse on x86 w/o AVX for x86 w/
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# AVX. We only check that the compiler can emit certain SIMD instructions, we don't care if the host system is able to run the binary.
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# Therefore, use check_cxx_source_compiles (= does the code compile+link?) instead of check_cxx_source_runs (= does the code
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# compile+link+run).
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set (TEST_FLAG "-mssse3")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <tmmintrin.h>
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int main() {
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__m64 a = _mm_abs_pi8(__m64());
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(void)a;
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return 0;
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}
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" HAVE_SSSE3)
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if (HAVE_SSSE3 AND ENABLE_SSSE3)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-msse4.1")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <smmintrin.h>
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int main() {
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auto a = _mm_insert_epi8(__m128i(), 0, 0);
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(void)a;
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return 0;
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}
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" HAVE_SSE41)
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if (HAVE_SSE41 AND ENABLE_SSE41)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-msse4.2")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <nmmintrin.h>
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int main() {
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auto a = _mm_crc32_u64(0, 0);
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(void)a;
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return 0;
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}
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" HAVE_SSE42)
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if (HAVE_SSE42 AND ENABLE_SSE42)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mpclmul")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <wmmintrin.h>
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int main() {
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auto a = _mm_clmulepi64_si128(__m128i(), __m128i(), 0);
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(void)a;
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return 0;
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}
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" HAVE_PCLMULQDQ)
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if (HAVE_PCLMULQDQ AND ENABLE_PCLMULQDQ)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mpopcnt")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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int main() {
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auto a = __builtin_popcountll(0);
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(void)a;
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return 0;
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}
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" HAVE_POPCNT)
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if (HAVE_POPCNT AND ENABLE_POPCNT)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mavx")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <immintrin.h>
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int main() {
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auto a = _mm256_insert_epi8(__m256i(), 0, 0);
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(void)a;
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return 0;
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}
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" HAVE_AVX)
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if (HAVE_AVX AND ENABLE_AVX)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mavx2")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <immintrin.h>
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int main() {
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auto a = _mm256_add_epi16(__m256i(), __m256i());
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(void)a;
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return 0;
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}
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" HAVE_AVX2)
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if (HAVE_AVX2 AND ENABLE_AVX2)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mavx512f -mavx512bw -mavx512vl")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <immintrin.h>
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int main() {
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auto a = _mm512_setzero_epi32();
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(void)a;
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auto b = _mm512_add_epi16(__m512i(), __m512i());
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(void)b;
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auto c = _mm_cmp_epi8_mask(__m128i(), __m128i(), 0);
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(void)c;
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return 0;
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}
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" HAVE_AVX512)
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if (HAVE_AVX512 AND ENABLE_AVX512)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mavx512vbmi")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <immintrin.h>
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int main() {
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auto a = _mm512_permutexvar_epi8(__m512i(), __m512i());
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(void)a;
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return 0;
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}
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" HAVE_AVX512_VBMI)
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if (HAVE_AVX512 AND ENABLE_AVX512 AND HAVE_AVX512_VBMI AND ENABLE_AVX512_VBMI)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mbmi")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <immintrin.h>
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int main() {
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auto a = _blsr_u32(0);
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(void)a;
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return 0;
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}
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" HAVE_BMI)
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if (HAVE_BMI AND ENABLE_BMI)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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set (TEST_FLAG "-mbmi2")
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set (CMAKE_REQUIRED_FLAGS "${TEST_FLAG} -O0")
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check_cxx_source_compiles("
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#include <immintrin.h>
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int main() {
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auto a = _pdep_u64(0, 0);
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(void)a;
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return 0;
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}
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" HAVE_BMI2)
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if (HAVE_BMI2 AND HAVE_AVX2 AND ENABLE_AVX2 AND ENABLE_BMI2)
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set (COMPILER_FLAGS "${COMPILER_FLAGS} ${TEST_FLAG}")
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endif ()
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# Limit avx2/avx512 flag for specific source build
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set (X86_INTRINSICS_FLAGS "")
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if (ENABLE_AVX2_FOR_SPEC_OP)
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if (HAVE_BMI)
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set (X86_INTRINSICS_FLAGS "${X86_INTRINSICS_FLAGS} -mbmi")
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endif ()
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if (HAVE_AVX AND HAVE_AVX2)
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set (X86_INTRINSICS_FLAGS "${X86_INTRINSICS_FLAGS} -mavx -mavx2")
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endif ()
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endif ()
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if (ENABLE_AVX512_FOR_SPEC_OP)
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set (X86_INTRINSICS_FLAGS "")
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if (HAVE_BMI)
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set (X86_INTRINSICS_FLAGS "${X86_INTRINSICS_FLAGS} -mbmi")
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endif ()
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if (HAVE_AVX512)
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set (X86_INTRINSICS_FLAGS "${X86_INTRINSICS_FLAGS} -mavx512f -mavx512bw -mavx512vl -mprefer-vector-width=256")
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endif ()
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endif ()
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else ()
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# RISC-V + exotic platforms
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endif ()
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cmake_pop_check_state ()
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