ClickHouse/contrib/libcpuid/include/libcpuid/intel_code_t.h
2018-06-22 00:51:14 +03:00

84 lines
2.5 KiB
C++

/*
* Copyright 2016 Veselin Georgiev,
* anrieffNOSPAM @ mgail_DOT.com (convert to gmail)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file contains a list of internal codes we use in detection. It is
* of no external use and isn't a complete list of intel products.
*/
CODE2(PENTIUM, 2000),
CODE(MOBILE_PENTIUM),
CODE(XEON),
CODE(XEON_IRWIN),
CODE(XEONMP),
CODE(XEON_POTOMAC),
CODE(XEON_I7),
CODE(XEON_GAINESTOWN),
CODE(XEON_WESTMERE),
CODE(MOBILE_PENTIUM_M),
CODE(CELERON),
CODE(MOBILE_CELERON),
CODE(NOT_CELERON),
CODE(CORE_SOLO),
CODE(MOBILE_CORE_SOLO),
CODE(CORE_DUO),
CODE(MOBILE_CORE_DUO),
CODE(WOLFDALE),
CODE(MEROM),
CODE(PENRYN),
CODE(QUAD_CORE),
CODE(DUAL_CORE_HT),
CODE(QUAD_CORE_HT),
CODE(MORE_THAN_QUADCORE),
CODE(PENTIUM_D),
CODE(ATOM_UNKNOWN),
CODE(ATOM_SILVERTHORNE),
CODE(ATOM_DIAMONDVILLE),
CODE(ATOM_PINEVIEW),
CODE(ATOM_CEDARVIEW),
CODE(CORE_I3),
CODE(CORE_I5),
CODE(CORE_I7),
CODE(CORE_IVY3), /* 22nm Core-iX */
CODE(CORE_IVY5),
CODE(CORE_IVY7),
CODE(CORE_HASWELL3), /* 22nm Core-iX, Haswell */
CODE(CORE_HASWELL5),
CODE(CORE_HASWELL7),
CODE(CORE_BROADWELL3), /* 14nm Core-iX, Broadwell */
CODE(CORE_BROADWELL5),
CODE(CORE_BROADWELL7),
CODE(CORE_SKYLAKE3), /* 14nm Core-iX, Skylake */
CODE(CORE_SKYLAKE5),
CODE(CORE_SKYLAKE7),